The present invention relates to a semiconductor package fabricated by using a TAB tape (referred to as TAB package), and more particularly, to the TAB package mounted on a printed circuit board by means of bumps.
Referring to FIG. 12, the structure of a conventional TAB package will be described. FIGS. 12(a) and 12(b) are a plan view and a sectional view showing the conditions immediately after connection of a semiconductor chip to a TAB tape in the conventional TAB packaging. As shown in FIGS. 12(a) and 12(b), a TAB tape includes a base film 9 having sprockets 1 for the purposes of conveyance and positioning. A device hole 22 for insertion of a semiconductor chip 4 and outer lead bonding (OLB) holes 19 are formed in the base film 9, and a copper foil is bonded to the surface of the base film 9 with an adhesive 8. The copper foil is made into inner leads 6, outer leads 20 and test pads 21 through patterning by photolithography. As shown in FIGS. 12(a) and 12(b), the inner leads 6 project into the device hole 22, and the outer leads 20 extend to the test pads 21 across the OLB holes 19. The surface of the inner lead 6 is gold plated to form a protective film. The inner leads 6 are connected to inner lead bonding (ILB) bumps of the semiconductor chip 4 arranged in the device hole 22.
The surface of the semiconductor chip 4 is coated with a protective resin 10 as shown in FIGS. 12(c), then the outer leads 20 are cut to separate the semiconductor chip mounting part from the tape main body. Such a package is mounted on a printed circuit board 13 by pressure bonding of the outer leads 20 to the OLB pads 12 of the board 13 as shown in FIGS. 12(d).
However, in the above-mentioned TAB package, the bonding of the outer leads 20 to the printed circuit board 13 is extremely difficult because of the very small thickness of about 35 .mu.m of the outer leads 20, so that it was necessary to prepare an OLB bonder dedicated to that purpose. Accordingly, it was necessary to mount such a package in a process different from that for other packages, such as a quad flat package (QFP), that can be mounted in a batch reflow process. Moreover, this bonding is done by thermocompression bonding, so that the product thus obtained lacks repairability. Because of this, the TAB package has been regarded as a special package which is devoid of the universality.
On the other hand, a ball grid array (BGA) package is introduced in NIKKEI Microdevices, March 1994 issue, pp. 58-64 as a package free from the above shortcomings and yet is superior in performance to the QFP. In this package, it is possible to increase the number of pins by employing a matrix-form arrangement of bumps on the surface of the package, and its electrical characteristics can be improved because of its small inductance.
In a tape BGA package in which a TAB tape is used as the substrate of the BGA package, the above-mentioned disadvantages can be dissolved. An example of the tape BGA package is disclosed in Japanese Patent Application Laid Open No. Sho 63-34936 (1988). However, in this package, through holes are formed in the base film and bumps to be bonded to the printed circuit board are formed via these through holes, so that it has a problem in that the fabrication process is complicated and the package obtained is very expensive.
Another example of the tape BGA package is disclosed in Japanese Patent Application Laid Open No. Sho 63-14455 (1988). However, this package has a problem in that the bonding inspection by visual observation after mounting on a printed circuit board is not possible because of the resin sealing of the entire surface of the TAB tape.